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  2. Details for: A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems
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A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems Nakamura, Kazuhiro; Shimazaki, Ryo; Yamamoto, Masatoshi; Takagi, Kazuyoshi; Takagi, Naofumi

Material type: TextTextPublication details: 2015Description: Book title: Embedded systems : high performance systems, applied principles and practice--Acession number C20720; pages 129-146Subject(s):
  • EMBEDDED SYSTEMS
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A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems

APA

(2015). A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems. : .

Chicago

2015. A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems. : .

Harvard

(2015). A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems. : .

MLA

A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems. : . 2015.

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SOUTHVILLE LIBRARY

Southville International School and Colleges Library

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Tel. No. 8256374 / 252358 Loc. 117/146

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